The embodiments of the present invention generally relate to multi-layer circuit boards having circuit layers, and more particularly, to a multi-layer circuit board having circuit layers that include unique differential connector patterns, or footprints.
In the past, controlled impedance connectors have been proposed that are used as board-to-board connectors. Certain board-to-board connectors attach to printed circuit boards through multiple circuit layers. The circuit layers may be either signal circuit layers or ground circuit layers. Typically, the circuit layers are positioned such that signal and ground circuit layers alternate. That is, two signal circuit layers are separated by one ground circuit layer. The signal layers may be sandwiched between the ground layers in order to control cross-talk, signal to noise ratio and impedance within the circuit board. Maintaining a uniform impedance throughout the signal path is preferable for proper signal transmission.
Previously, fluctuations in impedance exhibited by a connector did not degrade performance by an appreciable amount, in part because signal/data transmission rates were relatively low (e.g., less than 1 GHz or 1 Gbits per second). However, newer systems have been proposed that are able to transmit data signals at speeds approaching and exceeding 2 GHz or Gbits per second. Because the speed of data transmission systems continues to increase, even small impedance fluctuations may pose significant problems, such as signal loss, within each connector and the system.
Heretofore, high speed data systems have relied on signal resolution to compensate for signal discontinuities. Signal resolution regards voltage transitions within the system. For example, a voltage switch from 0 V to 1 V occurs in a finite amount of time referred to as the edge rate. The edge rate is a function of the distance over which (or time required for) the voltage changes. That is, if voltage is switched from 0 V to 1 V over a conductive path, the voltage switch does not occur instantaneously over the conductive path. Instead, a certain amount of resolution time is required over a conductive path to switch states. For example, if voltage changes over a conductive distance from point A to point B, the voltage change travels along the distance from point A to point B. That is, when the voltage first changes to 1 V, the voltage at point A may be 1 V, but the voltage at point B may still be 0 V. As the voltage change travels from point A to point B, the voltage changes over the distance from point A to point B. However, the voltage at point B changes to 1 V when the voltage change arrives at point B. The progression of the change of voltage from 0 V to 1 V over the distance defined by point A to point B is referred to as the edge. The amount of time for the voltage to change from 0 V to 1 V over the distance defined by point A to point B is the edge rate.
Typically, for a 2 GHz signal, signal edge rates range from 100 to 200 Pico seconds. The length of time of the transition directly affects the amount of jitter and the signal to noise ratio exhibited by the connector. An impedance mismatch at the connector typically causes jitter and noise throughout the system. The connectors and multi-layer circuit boards include several parts that may affect the impedance, such as, the trace segments on the circuit boards, vias through the circuit boards and contact pins engaging the vias. Vias in multi-layer printed circuit boards are capacitive. The capacitive nature of the vias typically causes the impedance of the vias to be lower than the desired signal impedance, that is, 50 Ohm or 100 Ohm. That is, typical connectors maintain an impedance lower than an ideal 50 Ohm or 100 Ohm (for differential connectors). Connector contacts have been positioned to optimize connector impedance, but have not been positioned to optimize connector footprint impedance.
Many board-to-board systems have been proposed that include multi-layer circuit boards and connectors there between that apply differential pairs of signals. The differential pairs include complimentary signals such that if one signal in a differential pair switches from 0 V to 1 V, the other signal in the differential pair switches from 1 V to 0 V. Differential pair connectors have been proposed that control impedance by using a calculated distance between signal pins of a differential pair. Impedance increases as capacitance decreases. Capacitance increases as the distance between a signal pin and ground or other signal pins decreases. Conversely, impedance increases with increased distance between signal pins. Therefore, signal pins of conventional systems are positioned a suitable distance from other signal pins in order to yield a suitable impedance. As the distance increases between two pins in a differential pair or otherwise, the pins are considered to be less xe2x80x9ctightly coupledxe2x80x9d to one another. Similarly, as the distance is decreased between pins in a differential pair or otherwise, the pins are considered to be more xe2x80x9ctightly coupledxe2x80x9d to one another. Loosening the coupling of signal pins of a differential pair increases the impedance exhibited at the pins while tightening the coupling between signal pins decreases the impedance.
Increasing the distance between signal pins of a differential pair also increases the interference, noise and jitter experienced from other signals in the multi-layer circuit board, the connector and pins. That is, as a signal pin of a differential pair is displaced further from its complimentary signal pin, each signal pin may become coupled to a signal pin of a different differential pair. As signal pins of separate different differential pairs become coupled to one another, the signal pins begin to exhibit cross-talk with each other. That is, loosening the coupling between complimentary signal pins may tighten the coupling between non-complimentary signal pins. Tightening the coupling between non-complimentary signal pins increases cross-talk between the pins. Consequently, interference, noise, and jitter within the multi-layer circuit board, connector and system increases. Therefore, increasing the distance between signal pins to increase the impedance within a particular differential pair of a multi-layer circuit board causes a higher degree of interference, noise and jitter within the multi-layer circuit board. Conversely, decreasing the distance between signal pins of a differential pair to decrease the amount of interference, noise and jitter within the multi-layer circuit board may produce a non-uniform or otherwise non-suitable impedance within the multi-layer circuit board.
Typically, signal pins and ground pins are arranged on circuit boards such that trace segments twist and turn around signal pins in order to connect to target signal pins. The signal pins are spaced to form routing channels there between the trace segments laid along non-linear routing channels. Heretofore, it has went unrecognized that non-linear routing channels degrade the signal performance. Instead, routing channels have been afforded less importance than via and pin position. The routing channels may be non-linear due to the presence of ground vias and pins or signal vias and pins that block a straight path to the target signal pin.
Typically, a pair of trace segments on a circuit layer connect to a differential pair of signal pins. That is, one trace segment connects to one signal pin of a differential pair while another trace segment connects to the complimentary signal pin. However, because of the non-linear tracing routes, the trace segments typically are not of equal length. Consequently, differential signals traveling through trace segments of different length may be out of phase with each other when arriving at an output pin or via. Differential signals that are out of phase, or skewed, may yield higher levels of interference within the connector and the system.
Thus, a need has existed for a multi-layer circuit board that exhibits improved signal characteristics in terms of impedance, interference, noise and jitter. That is, a need has existed for a multi-layer circuit board that maintains a suitable impedance at contact pins while simultaneously reducing the amount of interference, noise, and jitter within the multi-layer circuit board. Additionally, a need has existed for a multi-layer circuit board that exhibits less skew.
In accordance with an embodiment of the present invention, a multi-layer circuit board has been developed that simultaneously maintains a desired impedance while reducing interference within a multi-layer circuit board. The multi-layer circuit board includes at least one signal circuit layer, a plurality of signal contacts grouped in differential pairs and located on at least one signal circuit layer, and a plurality of ground contacts located on at least one ground circuit layer. The signal contacts are arranged in a pattern, or matrix, in which differential pairs of signal contacts are arranged in rows of the pattern, yet are staggered relative to differential pairs in adjacent rows. The signal contacts in each of the differential pairs are aligned in a first direction, for example, in rows. The differential pairs are staggered relative to other differential pairs oriented in a second direction, for example, columns. Because the differential pairs are staggered relative to one another, the number of circuit layers required to route all of the contacts is less than the number of rows of signal contacts in the pattern. The signal contacts may be vias, metal pins, metal pins retained within vias, and the like. The signal pins may be included within a connector and inserted into the vias.
In accordance with an embodiment of the present invention, each differential pair of the multi-layer circuit board is more tightly coupled to a ground contact than to any other signal contact. That is, a first signal contact of a differential pair is more tightly coupled to a ground contact than to a second signal contact of the differential pair.
In accordance with an embodiment of the present invention, the multi-layer circuit board includes a plurality of signal trace segments arranged in pairs. The signal trace segments are located on a circuit layer. On each circuit layer of the multi-layer circuit board, the signal trace segments of a pair are equal in length. The signal trace segments of a pair are mirror images of each other. That is, the position of each trace segment of a pair mirrors the position of the other, complimentary trace segment of the par. Further, in accordance with an embodiment of the present invention, a first signal trace segment of one pair electrically connects to a first signal contact of a differential pair while a second signal trace segment of the pair electrically connects to a second signal contact of the differential pair. The trace segments are routed adjacent one another along routing channels, or trace routes. The routing channels are linearly aligned in a different direction, or orientation, to that of the differential pairs. For example, if the differential pairs are aligned in rows, the routing channels may be oriented such that the routing channels are aligned perpendicular to the rows of differential pairs. That is, the signal pairs may be routed by in-column trace routes.